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Existing logic-locking attacks are known to successfully decrypt functionallycorrect key of a locked combinational circuit. It is possible to extend theseattacks to real-world Silicon-based Intellectual Properties (IPs, which aresequential circuits) through scan-chains by selectively initializing thecombinational logic and analyzing the responses. In this paper, we proposeSeqL, which achieves functional isolation and locks selective flip-flopfunctional-input/scan-output pairs, thus rendering the decrypted keyfunctionally incorrect. We conduct a formal study of the scan-locking problemand demonstrate automating our proposed defense on any given IP. We show thatSeqL hides functionally correct keys from the attacker, thereby increasing thelikelihood of the decrypted key being functionally incorrect. When tested onpipelined combinational benchmarks (ISCAS,MCNC), sequential benchmarks (ITC)and a fully-fledged RISC-V CPU, SeqL gave 100% resilience to a broad range ofstate-of-the-art attacks including SAT[1], Double-DIP[2], HackTest[3], SMT[4],FALL[5], Shift-and-Leak[6] and Multi-cycle attacks[7].

SeqL: Secure Scan-Locking for IP Protection