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3D integration, i.e., stacking of integrated circuit layers using parallel orsequential processing is gaining rapid industry adoption with the slowdown ofMoore's law scaling. 3D stacking promises potential gains in performance, powerand cost but the actual magnitude of gains varies depending on end-application,technology choices and design. In this talk, we will discuss some keychallenges associated with 3D design and how design-for-3D will require us tobreak traditional silos of micro-architecture, circuit/physical design andmanufacturing technology to work across abstractions to enable the gainspromised by 3D technologies.

Stack up your chips: Betting on 3D integration to augment Moore's Law scaling