English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Plus monthly

Global: Zendy Tools annual

Global: Zendy Tools monthly

Global: Zendy Free Plan

In this paper, we exploit the aggressive supply voltage underscalingtechnique in Block RAMs (BRAMs) of Field Programmable Gate Arrays (FPGAs) toimprove the energy efficiency of Multi-Layer Perceptrons (MLPs). Additionally,we evaluate and improve the resilience of this accelerator. Through experimentson several representative FPGA fabrics, we observe that until a minimum safevoltage level, i.e., Vmin the MLP accuracy is not affected. This safe regioninvolves a large voltage guardband. Also, it involves a narrower voltage regionwhere faults start to appear in memories due to the increased circuit delay,but these faults are masked by MLP, and thus, its accuracy is not affected.However, further undervolting causes significant accuracy loss as a result ofthe fast-increasing high fault rates. Based on the characterization of theseundervolting faults, we propose fault mitigation techniques that caneffectively improve the resilience behavior of such accelerator. Our evaluationis based on four FPGA platforms. On average, we achieve >90% energy saving witha negligible accuracy loss of up to 0.1%.

Power and Accuracy of Multi-Layer Perceptrons (MLPs) under Reduced-voltage FPGA BRAMs Operation