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The current mobile applications have rapidly growing memory footprints,posing a great challenge for memory system design. Insufficient DRAM mainmemory will incur frequent data swaps between memory and storage, a processthat hurts performance, consumes energy and deteriorates the write endurance oftypical flash storage devices. Alternately, a larger DRAM has higher leakagepower and drains the battery faster. Further, DRAM scaling trends make furthergrowth of DRAMin the mobile space prohibitive due to cost. Emergingnon-volatile memory (NVM) has the potential to alleviate these issues due toits higher capacity per cost than DRAM and mini-mal static power. Recently, awide spectrum of NVM technologies, including phase-change memories (PCM),memristor, and 3D XPoint have emerged. Despite the mentioned advantages, NVMhas longer access latency compared to DRAMand NVM writes can incur higherlatencies and wear costs. Therefore integration of these new memorytechnologies in the memory hierarchy requires a fundamental rearchitect-ing oftraditional system designs. In this work, we propose a hardware-acceleratedmemory manager (HMMU) that addresses both types of memory in a flat spaceaddress space. We design a set of data placement and data migration policieswithin this memory manager, such that we may exploit the advantages of eachmemory technology. By augmenting the system with this HMMU, we reduce theoverall memory latency while also reducing writes to the NVM. Experimentalresults show that our design achieves a 39% reduction in energy consumptionwith only a 12% performance degradation versus an all-DRAM baseline that islikely untenable in the future.

Hardware Memory Management for Future Mobile Hybrid Memory Systems