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Convolutional Neural Networks (CNNs) have a major impact on our societybecause of the numerous services they provide. On the other hand, they requireconsiderable computing power. To satisfy these requirements, it is possible touse graphic processing units (GPUs). However, high power consumption andlimited external IOs constrain their usability and suitability in industrialand mission-critical scenarios. Recently, the number of researches that utilizeFPGAs to implement CNNs are increasing rapidly. This is due to the lower powerconsumption and easy reconfigurability offered by these platforms. Because ofthe research efforts put into topics such as architecture, synthesis andoptimization, some new challenges are arising to integrate such hardwaresolutions to high-level machine learning software libraries. This paperintroduces an integrated framework (CNN2Gate) that supports compilation of aCNN model for an FPGA target. CNN2Gate exploits the OpenCL synthesis workflowfor FPGAs offered by commercial vendors. CNN2Gate is capable of parsing CNNmodels from several popular high-level machine learning libraries such asKeras, Pytorch, Caffe2 etc. CNN2Gate extracts computation flow of layers, inaddition to weights and biases and applies a "given" fixed-point quantization.Furthermore, it writes this information in the proper format for OpenCLsynthesis tools that are then used to build and run the project on FPGA.CNN2Gate performs design-space exploration using a reinforcement learning agentand fits the design on different FPGAs with limited logic resourcesautomatically. This paper reports results of automatic synthesis anddesign-space exploration of AlexNet and VGG-16 on various Intel FPGA platforms.CNN2Gate achieves a latency of 205 ms for VGG-16 and 18 ms for AlexNet on theFPGA.

CNN2Gate: Toward Designing a General Framework for Implementation of Convolutional Neural Networks on FPGA