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FPGAs have shown great potential in providing low-latency andenergy-efficient solutions for deep neural network (DNN) inferenceapplications. Currently, the majority of FPGA-based DNN accelerators in thecloud run in a time-division multiplexing way for multiple users sharing asingle FPGA, and require re-compilation with $\sim$100 s overhead. Such designslead to poor isolation and heavy performance loss for multiple users, which arefar away from providing efficient and flexible FPGA virtualization for neitherpublic nor private cloud scenarios.  To solve these problems, we introduce a novel virtualization framework forinstruction architecture set (ISA) based on DNN accelerators by sharing asingle FPGA. We enable the isolation by introducing a two-level instructiondispatch module and a multi-core based hardware resources pool. Such designsprovide isolated and runtime-programmable hardware resources, further leadingto performance isolation for multiple users. On the other hand, to overcome theheavy re-compilation overheads, we propose a tiling-based instruction framepackage design and two-stage static-dynamic compilation. Only the light-weightruntime information is re-compiled with $\sim$1 ms overhead, thus theperformance is guaranteed for the private cloud. Our extensive experimentalresults show that the proposed virtualization design achieves 1.07-1.69x and1.88-3.12x throughput improvement over previous static designs using thesingle-core and the multi-core architectures, respectively.

Enabling Efficient and Flexible FPGA Virtualization for Deep Learning in the Cloud