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By combining Three Dimensional Integrated Circuits with the Network-on-Chipinfrastructure to obtain 3D Networks-on-Chip (3D-NoCs), the new on-chipcommunication paradigm brings several advantages on lower power, smallerfootprint and lower latency. However, thermal dissipation is one of the mostcritical challenges for 3D-ICs where the heat cannot easily transfer throughseveral layers of silicon. Consequently, the high-temperature area alsoconfronts the reliability threat as the Mean Time to Failure (MTTF) decreasesexponentially with the operating temperature. Apparently, 3D-NoCs must tacklethis fundamental problem in order to be widely used. Therefore, in this work,we investigate the thermal distribution and reliability prediction of 3D-NoCs.We first present a new method to help simulate the temperature (both steady andtransient) using traffics value from realistic and synthetic benchmarks and thepower consumption from standard VLSI design flow. Then, based on the proposedmethod, we further predict the relative reliability between different parts ofthe network. Experimental results show that the method has an extremely fastexecution time in comparison to the acceleration lifetime test. Furthermore, wecompare the thermal behavior and reliability between Monolithic design andTSV-based TSV. We also explorer the ability to implement the thermal via amechanism to help reduce the operating temperature.

Report on power, thermal and reliability prediction for 3D Networks-on-Chip