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Stochastic unary computing provides low-area circuits. However, the requiredarea consuming stochastic number generators (SNGs) in these circuits candiminish their overall gain in area, particularly if several SNGs are required.We propose area-efficient SNGs by sharing the permuted output of one linearfeedback shift register (LFSR) among several SNGs. With no hardware overhead,the proposed architecture generates stochastic bit streams with minimumstochastic computing correlation (SCC). Compared to the circular shiftingapproach presented in prior work, our approach produces stochastic bit streamswith 67% less average SCC when a 10-bit LFSR is shared between two SNGs. Togeneralize our approach, we propose an algorithm to find a set of mpermutations (n>m>2) with minimum pairwise SCC, for an n-bit LFSR. The searchspace for finding permutations with exact minimum SCC grows rapidly when nincreases and it is intractable to perform a search algorithm using accuratelycalculated pairwise SCC values, for n>9. We propose a similarity function thatcan be used in the proposed search algorithm to quickly find a set ofpermutations with SCC values close to the minimum one. We evaluated ourapproach for several applications. The results show that, compared to priorwork, it achieves lower MSE with the same (or even lower) area. Additionally,based on simulation results, we show that replacing the comparator component ofan SNG circuit with a weighted binary generator can reduce SCC.

Low-cost Stochastic Number Generators for Stochastic Computing