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In computational neuroscience, as well as in machine learning, neuromorphicdevices promise an accelerated and scalable alternative to neural networksimulations. Their neural connectivity and synaptic capacity depends on theirspecific design choices, but is always intrinsically limited. Here, we presenta strategy to achieve structural plasticity that optimizes resource allocationunder these constraints by constantly rewiring the pre- and gpostsynapticpartners while keeping the neuronal fan-in constant and the connectome sparse.In particular, we implemented this algorithm on the analog neuromorphic systemBrainScaleS-2. It was executed on a custom embedded digital processor locatedon chip, accompanying the mixed-signal substrate of spiking neurons and synapsecircuits. We evaluated our implementation in a simple supervised learningscenario, showing its ability to optimize the network topology with respect tothe nature of its training data, as well as its overall computationalefficiency.

Structural plasticity on an accelerated analog neuromorphic hardware system