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As quantum hardware increases in complexity, successful algorithmic executionrelies more heavily on awareness of existing device constraints. In this workwe focus on the problem of routing quantum information across the machine toovercome the limited connectivity of quantum hardware. Previous approachesaddress the problem for each two-qubit gate separately and then impose thecompatibility of the different routes. Here we shift the focus onto the set ofall routing operations that are possible at any given time and favor those thatmost benefit the global pattern of two-qubit gates. We benchmark ouroptimization technique by scheduling variational algorithms for transmon chips.Finally we apply our scheduler to the design problem of quantifying the impactof manufacturing decisions. Specifically, we address the number of distinctqubit frequencies in superconducting architectures and how they affect thealgorithmic performance of the quantum Fourier transform.

Scheduler of quantum circuits based on dynamical pattern improvement and its application to hardware design