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Performance optimization is the art of continuous seeking a harmoniousmapping between the application domain and hardware. Recent years havewitnessed a surge of deep learning (DL) applications in industry. Conventionalwisdom for optimizing such workloads mainly focus on compute intensive ops(GEMM, Convolution, etc). Yet we show in this work, that the performance ofmemory intensive computations is vital to E2E performance in practical DLmodels. We propose \emph{FusionStitching}, a optimization framework capable offusing memory intensive \emph{elementwise}, \emph{reduction} and fine grained\emph{GEMM/Batched-GEMM} ops, with or without data dependences, into largecomputation units, then mapping and transforming them into efficient GPUkernels. We formulate the fusion plan optimization as an integer linearprogramming (ILP) problem, and propose a set of empirical heuristics to reducethe combinatorial search space. In order to map optimized fusion plans tohardware, we propose a technique to effectively compose various groups ofcomputations into a single GPU kernel, by fully leveraging on chip resourceslike scratchpads or registers. Experimental results on six benchmarks and fourindustry scale practical models are encouraging. Overall,\emph{FusionStitching} can reach up to 5.7x speedup compared to Tensorflowbaseline, and achieves 1.25x to 1.85x performance speedups compared to currentstate of the art, with 1.4x on average (geometric mean).

FusionStitching: Boosting Execution Efficiency of Memory Intensive Computations for DL Workloads