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An effective way to improve energy efficiency is to throttle hardwareresources to meet a certain performance target, specified as a QoS constraint,associated with all applications running on a multicore system.  Prior art has proposed resource management (RM) frameworks in which the shareof the last-level cache (LLC) assigned to each processor and thevoltage-frequency (VF) setting for each processor is managed in a coordinatedfashion to reduce energy. A drawback of such a scheme is that, while one coregives up LLC resources for another core, the performance drop must becompensated by a higher VF setting which leads to a quadratic increase inenergy consumption. By allowing each core to be adapted to exploit instructionand memory-level parallelism (ILP/MLP), substantially higher energy savings areenabled.  This paper proposes a coordinated RM for LLC partitioning, processoradaptation, and per-core VF scaling. A first contribution is a systematic studyof the resource trade-offs enabled when trading between the three classes ofresources in a coordinated fashion. A second contribution is a new RM frameworkthat utilizes these trade-offs to save more energy. Finally, a challenge toaccurately model the impact of resource throttling on performance is to predictthe amount of MLP with high accuracy. To this end, the paper contributes with amechanism that estimates the effect of MLP over different processorconfigurations and LLC allocations. Overall, we show that up to 18% of energy,and on average 10%, can be saved using the proposed scheme.

Coordinated Management of Processor Configuration and Cache Partitioning to Optimize Energy under QoS Constraints