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Resistive Random Access Memory (RRAM) and Phase Change Memory (PCM) deviceshave been popularly used as synapses in crossbar array based analog NeuralNetwork (NN) circuit to achieve more energy and time efficient dataclassification compared to conventional computers. Here we demonstrate theadvantages of recently proposed spin orbit torque driven Domain Wall (DW)device as synapse compared to the RRAM and PCM devices with respect to on-chiplearning (training in hardware) in such NN. Synaptic characteristic of DWsynapse, obtained by us from micromagnetic modeling, turns out to be much morelinear and symmetric (between positive and negative update) than that of RRAMand PCM synapse. This makes design of peripheral analog circuits for on-chiplearning much easier in DW synapse based NN compared to that for RRAM and PCMsynapses. We next incorporate the DW synapse as a Verilog-A model in thecrossbar array based NN circuit we design on SPICE circuit simulator.Successful on-chip learning is demonstrated through SPICE simulations on thepopular Fisher's Iris dataset. Time and energy required for learning turn outto be orders of magnitude lower for DW synapse based NN circuit compared tothat for RRAM and PCM synapse based NN circuits.

Comparing domain wall synapse with other Non Volatile Memory devices for on-chip learning in Analog Hardware Neural Network