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To accelerate inference of Convolutional Neural Networks (CNNs), varioustechniques have been proposed to reduce computation redundancy. Convertingconvolutional layers into frequency domain significantly reduces thecomputation complexity of the sliding window operations in space domain. On theother hand, weight pruning techniques address the redundancy in modelparameters by converting dense convolutional kernels into sparse ones. Toobtain high-throughput FPGA implementation, we propose SPEC2 -- the first workto prune and accelerate spectral CNNs. First, we propose a systematic pruningalgorithm based on Alternative Direction Method of Multipliers (ADMM). Theoffline pruning iteratively sets the majority of spectral weights to zero,without using any handcrafted heuristics. Then, we design an optimized pipelinearchitecture on FPGA that has efficient random access into the sparse kernelsand exploits various dimensions of parallelism in convolutional layers.Overall, SPEC2 achieves high inference throughput with extremely lowcomputation complexity and negligible accuracy degradation. We demonstrateSPEC2 by pruning and implementing LeNet and VGG16 on the Xilinx Virtexplatform. After pruning 75% of the spectral weights, SPEC2 achieves 0% accuracyloss for LeNet, and <1% accuracy loss for VGG16. The resulting acceleratorsachieve up to 24x higher throughput, compared with the state-of-the-art FPGAimplementations for VGG16.

SPEC2: SPECtral SParsE CNN Accelerator on FPGAs