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Two-dimensional (2D) semiconductors are widely recognized as attractivechannel materials for low-power electronics. However, an unresolved challengeis the integration of high-quality, ultrathin high-\k{appa} dielectrics thatfully meet the roadmap requirements for low-power applications. With adangling-bond free surface, the deposition of dielectrics by atomic layerdeposition (ALD) on 2D materials is usually characterized with non-uniformnucleation and island formation, producing a highly porous dielectric layerwith serious leakage particularly at the small equivalent oxide thickness (EOT)limit. Here, we report the robust ALD of highly uniform high-\k{appa}dielectric on 2D semiconductors by using ~0.3 nm-thick exclusively monolayermolecular crystal as seeding layer. Ultrathin dielectrics down to 1 nm EOT isrealized on graphene, MoS2 and WSe2, with considerably reduced roughness,density of interface states, leakage current and improved breakdown fieldcompared to prior methods. Taking advantage of the reduced EOT, we demonstrategraphene RF transistors operating at 60 GHz, as well as MoS2 and WSe2complementary metal-oxide-semiconductor (CMOS) transistors with Vdd =0.8 V andideal subthreshold swing (SS) of 60 mV/dec, 20 nm-channel-length MoS2transistors with on/off ratio over 10^7. These studies highlight that ourdielectric integration method is generally applicable for different 2Dmaterials, and compatible with top-down fabrication process on large-areachemical vapor deposited films.

Integrating high-quality dielectrics with one-nanometer equivalent oxide thickness on two-dimensional electronic devices