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Major chip manufacturers have all introduced multicore microprocessors.Multi-socket systems built from these processors are used for running variousserver applications. Depending on the application that is run on the system,remote memory accesses can impact overall performance. This paper presents acache optimization that can cut down remote DRAM accesses. By keeping track ofremote cache lines loaded from remote DRAM and by biasing the cache replacementpolicy towards such remote DRAM cache lines the number of cache misses arereduced. This in turn results in improvement of overall performance. I presentthe design details in this paper. I do a qualitative comparison of varioussolutions to the problem of performance impact of remote DRAM accesses. Thiswork can be extended by doing a quantitative evaluation and by further refiningcache optimization.

Cache Optimization for Memory Intensive Workloads on Multi-socket Multi-core servers