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A resistive memory device-based computing architecture is one of thepromising platforms for energy-efficient Deep Neural Network (DNN) trainingaccelerators. The key technical challenge in realizing such accelerators is toaccumulate the gradient information without a bias. Unlike the digital numbersin software which can be assigned and accessed with desired accuracy, numbersstored in resistive memory devices can only be manipulated following thephysics of the device, which can significantly limit the training performance.Therefore, additional techniques and algorithm-level remedies are required toachieve the best possible performance in resistive memory device-basedaccelerators. In this paper, we analyze asymmetric conductance modulationcharacteristics in RRAM by Soft-bound synapse model and present an in-depthanalysis on the relationship between device characteristics and DNN modelaccuracy using a 3-layer DNN trained on the MNIST dataset. We show that theimbalance between up and down update leads to a poor network performance. Weintroduce a concept of symmetry point and propose a zero-shifting techniquewhich can compensate imbalance by programming the reference device and changingthe zero value point of the weight. By using this zero-shifting method, we showthat network performance dramatically improves for imbalanced synapse devices.

Zero-shifting Technique for Deep Neural Network Training on Resistive Cross-point Arrays