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We propose a three-stage load balancing packet switch and its configurationscheme. The input- and central-stage switches are bufferless crossbars, and theoutput-stage switches are buffered crossbars. We call this switch ThRee-stageClos-network swItch with queues at the middle stage and DEtermiNisTicscheduling (TRIDENT), and the switch is cell based. The proposed configurationscheme uses predetermined and periodic interconnection patterns in the inputand central modules to load-balance and route traffic, therefore; it has lowconfiguration complexity. The operation of the switch includes a mechanismapplied at input and output modules to forward cells in sequence. TRIDENTachieves 100% throughput under uniform and nonuniform admissible traffic withindependent and identical distributions (i.i.d.). The switch achieves this highperformance using a low-complexity architecture while performing in-sequenceforwarding and no central-stage expansion or memory speedup. Our discussionincludes throughput analysis, where we describe the operations theconfiguration mechanism performs on the traffic traversing the switch, andproof of in-sequence forwarding. We present a simulation analysis as apractical demonstration of the switch performance under uniform and nonuniformi.i.d. traffic.

TRIDENT: A load-balancing Clos-network Packet Switch with Queues between Input and Central Stages and In-Order Forwarding