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High-Level Synthesis (HLS) brings FPGAs to audiences previously unfamiliar tohardware design. However, achieving the highest Quality-of-Results (QoR) withHLS is still unattainable for most programmers. This requires detailedknowledge of FPGA architecture and hardware design in order to produceFPGA-friendly codes. Moreover, these codes are normally in conflict with bestcoding practices, which favor code reuse, modularity, and conciseness.  To overcome these limitations, we propose Module-per-Object (MpO), ahuman-driven HLS design methodology intended for both hardware designers andsoftware developers with limited FPGA expertise. MpO exploits modern C++ toraise the abstraction level while improving QoR, code readability andmodularity. To guide HLS designers, we present the five characteristics of MpOclasses. Each characteristic exploits the power of HLS-supported modern C++features to build C++-based hardware modules. These characteristics lead tohigh-quality software descriptions and efficient hardware generation. We alsopresent a use case of MpO, where we use C++ as the intermediate language forFPGA-targeted code generation from P4, a packet processing domain specificlanguage. The MpO methodology is evaluated using three design experiments: apacket parser, a flow-based traffic manager, and a digital up-converter. Basedon experiments, we show that MpO can be comparable to hand-written VHDL codewhile keeping a high abstraction level, human-readable coding style andmodularity. Compared to traditional C-based HLS design, MpO leads to moreefficient circuit generation, both in terms of performance and resourceutilization. Also, the MpO approach notably improves software quality,augmenting parametrization while eliminating the incidence of code duplication.

Module-per-Object: a Human-Driven Methodology for C++-based High-Level Synthesis Design