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Transistor-based memories are rapidly approaching their maximum density perunit area. Resistive crossbar arrays enable denser memory due to the small sizeof switching devices. However, due to the resistive nature of these memories,they suffer from current sneak paths complicating the readout procedure. Inthis paper, we propose a row readout technique with circuitry that can be usedto read {selector-less} resistive crossbar based memories. High throughputreading and writing techniques are needed to overcome the memory-wallbottleneck problem and to enable near memory computing paradigm. The proposedtechnique can read the entire row of dense crossbar arrays in one cycle, unlikepreviously published techniques. The requirements for the readout circuitry arediscussed and satisfied in the proposed circuit. Additionally, an approximatedexpression for the power consumed while reading the array is derived. A figureof merit is defined and used to compare the proposed approach with existingreading techniques. Finally, a quantitative analysis of the effect of biasingmismatch on the array size is discussed.

On Resistive Memories: One Step Row Readout Technique and Sensing Circuitry