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A time-domain analog weighted-sum calculation model is proposed based on anintegrate-and-fire-type spiking neuron model. The proposed calculation model isapplied to multi-layer feedforward networks, in which weighted summations withpositive and negative weights are separately performed in each layer andsummation results are then fed into the next layers without their subtractionoperation. We also propose very large-scale integrated (VLSI) circuits toimplement the proposed model. Unlike the conventional analog voltage or currentmode circuits, the time-domain analog circuits use transient operation incharging/discharging processes to capacitors. Since the circuits can bedesigned without operational amplifiers, they can operate with extremely lowpower consumption. However, they have to use very high resistance devices onthe order of G$\rm \Omega$. We designed a proof-of-concept (PoC) CMOS VLSI chipto verify weighted-sum operation with the same weights and evaluated it bypost-layout circuit simulation using 250-nm fabrication technology. Highresistance operation was realized by using the subthreshold operation region ofMOS transistors. Simulation results showed that energy efficiency for theweighted-sum calculation was 290~TOPS/W, more than one order of magnitudehigher than that in state-of-the-art digital AI processors, even though theminimum width of interconnection used in the PoC chip was several times largerthan that in such digital processors. If state-of-the-art VLSI technology isused to implement the proposed model, an energy efficiency of more than1,000~TOPS/W will be possible. For practical applications, development ofemerging analog memory devices such as ferroelectric-gate FETs is necessary.

A Time-domain Analog Weighted-sum Calculation Model for Extremely Low Power VLSI Implementation of Multi-layer Neural Networks