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A recent trend in DNN development is to extend the reach of deep learningapplications to platforms that are more resource and energy constrained, e.g.,mobile devices. These endeavors aim to reduce the DNN model size and improvethe hardware processing efficiency, and have resulted in DNNs that are muchmore compact in their structures and/or have high data sparsity. These compactor sparse models are different from the traditional large ones in that there ismuch more variation in their layer shapes and sizes, and often requirespecialized hardware to exploit sparsity for performance improvement. Thus,many DNN accelerators designed for large DNNs do not perform well on thesemodels. In this work, we present Eyeriss v2, a DNN accelerator architecturedesigned for running compact and sparse DNNs. To deal with the widely varyinglayer shapes and sizes, it introduces a highly flexible on-chip network, calledhierarchical mesh, that can adapt to the different amounts of data reuse andbandwidth requirements of different data types, which improves the utilizationof the computation resources. Furthermore, Eyeriss v2 can process sparse datadirectly in the compressed domain for both weights and activations, andtherefore is able to improve both processing speed and energy efficiency withsparse models. Overall, with sparse MobileNet, Eyeriss v2 in a 65nm CMOSprocess achieves a throughput of 1470.6 inferences/sec and 2560.3 inferences/Jat a batch size of 1, which is 12.6x faster and 2.5x more energy efficient thanthe original Eyeriss running MobileNet. We also present an analysis methodologycalled Eyexam that provides a systematic way of understanding the performancelimits for DNN processors as a function of specific characteristics of the DNNmodel and accelerator design; it applies these characteristics as sequentialsteps to increasingly tighten the bound on the performance limits.

Eyeriss v2: A Flexible Accelerator for Emerging Deep Neural Networks on Mobile Devices