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One of the optimization goals of a particle accelerator is to reach thehighest possible beam peak current. For that to happen the electron bunchpropagating through the accelerator should be kept relatively short along thedirection of its travel. In order to obtain a better understanding of the beamcomposition it is crucial to evaluate the electric charge distribution alongthe micrometer-scale packets. The task of the Electro-Optic Detector (EOD) isto imprint the beam charge profile on the spectrum of light of a laser pulse.The actual measurement of charge distribution is then extracted with aspectrometer based on a diffraction grating.  The article focuses on developed data acquisition and processing systemcalled the High-speed Optical Line Detector (HOLD). It is a 1D imageacquisition system which solves several challenges related to capturing,buffering, processing and transmitting large data streams with use of the FPGAdevice. It implements a latency-optimized custom architecture based on the AXIinterfaces. The HOLD device is realized as an FPGA Mezzanine Card (FMC) carrierwith single High Pin-Count connector hosting the KIT KALYPSO detector.  The solution presented in the paper is probably one of the world fastest linecameras. Thanks to its custom architecture it is capable of capturing at least10 times more frames per second than fastest comparable commercially availabledevices.

Real-time Data Acquisition and Processing System for MHz Repetition Rate Image Sensors