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Neuromorphic computing, inspired by the brain, promises extreme efficiencyfor certain classes of learning tasks, such as classification and patternrecognition. The performance and power consumption of neuromorphic computingdepends heavily on the choice of the neuron architecture. Digital neurons(Dig-N) are conventionally known to be accurate and efficient at high speed,while suffering from high leakage currents from a large number of transistorsin a large design. On the other hand, analog/mixed-signal neurons are prone tonoise, variability and mismatch, but can lead to extremely low-power designs.In this work, we will analyze, compare and contrast existing neuronarchitectures with a proposed mixed-signal neuron (MS-N) in terms ofperformance, power and noise, thereby demonstrating the applicability of theproposed mixed-signal neuron for achieving extreme energy-efficiency inneuromorphic computing. The proposed MS-N is implemented in 65 nm CMOStechnology and exhibits > 100X better energy-efficiency across all frequenciesover two traditional digital neurons synthesized in the same technology node.We also demonstrate that the inherent error-resiliency of a fully connected oreven convolutional neural network (CNN) can handle the noise as well as themanufacturing non-idealities of the MS-N up to certain degrees. Notably, asystem-level implementation on MNIST datasets exhibits a worst-case increase inclassification error by 2.1% when the integrated noise power in the bandwidthis ~ 0.1 uV2, along with +-3{\sigma} amount of variation and mismatchintroduced in the transistor parameters for the proposed neuron with 8-bitprecision.

Exploiting Inherent Error-Resiliency of Neuromorphic Computing to achieve Extreme Energy-Efficiency through Mixed-Signal Neurons