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The Square Kilometre Array (SKA) project will be the world largest radiotelescope array. With its large number of antennas, the number of signals thatneed to be processed is dramatic. One important element of the SKA's CentralSignal Processor package is pulsar search. This paper focuses on the FPGA-basedacceleration of the Frequency-Domain Acceleration Search module, which is apart of SKA pulsar search engine. In this module, the frequency-domain inputsignals have to be processed by 85 Finite Impulse response (FIR) filters withina short period of limitation and for thousands of input arrays. Because of thelarge scale of the input length and FIR filter size, even high-end FPGA devicescannot parallelise the task completely. We start by investigating bothtime-domain FIR filter (TDFIR) and frequency-domain FIR filter (FDFIR) totackle this task. We applied the overlap-add algorithm to split the coefficientarray of TDFIR and the overlap-save algorithm to split the input signals ofFDFIR. To achieve fast prototyping design, we employed OpenCL, which is ahigh-level FPGA development technique. The performance and power consumptionare evaluated using multiple FPGA devices simultaneously and compared with GPUresults, which is achieved by porting FPGA-based OpenCL kernels. Theexperimental evaluation shows that the FDFIR solution is very competitive interms of performance, with a clear energy consumption advantage over the GPUsolution.

FPGA-based Acceleration of FT Convolution for Pulsar Search Using OpenCL