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Gate camouflaging is a known security enhancement technique that tries tothwart reverse engineering by hiding the functions of gates or the connectionsbetween them. A number of works on SAT-based attacks have shown that it isoften possible to reverse engineer a circuit function by combining acamouflaged circuit model and the ability to have oracle access to theobfuscated combinational circuit. Especially in small circuits it is easy toreverse engineer the circuit function in this way, but SAT-based reverseengineering techniques provide no guarantees of recovering a circuit that isgate-by-gate equivalent to the original design. In this work we show that anattacker who does not know gate functions or connections of an aggressivelycamouflaged circuit cannot learn the correct gate-level schematic even if ableto control inputs and probe all combinational nodes of the circuit. We thenpresent a stronger attack that extends SAT-based reverse engineering with faultanalysis to allow an attacker to recover the correct gate-level schematic. Weanalyze our reverse engineering approach on an S-Box circuit.

SAT-based Reverse Engineering of Gate-Level Schematics using Fault Injection and Probing