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With recent trend of wearable devices and Internet of Things (IoTs), itbecomes attractive to develop hardware-based deep convolutional neural networks(DCNNs) for embedded applications, which require low power/energy consumptionsand small hardware footprints. Recent works demonstrated that the StochasticComputing (SC) technique can radically simplify the hardware implementation ofarithmetic units and has the potential to satisfy the stringent powerrequirements in embedded devices. However, in these works, the memory designoptimization is neglected for weight storage, which will inevitably result inlarge hardware cost. Moreover, if conventional volatile SRAM or DRAM cells areutilized for weight storage, the weights need to be re-initialized whenever theDCNN platform is re-started.  In order to overcome these limitations, in this work we adopt an emergingnon-volatile Domain-Wall Memory (DWM), which can achieve ultra-high density, toreplace SRAM for weight storage in SC-based DCNNs. We propose DW-CNN, the firstcomprehensive design optimization framework of DWM-based weight storage method.We derive the optimal memory type, precision, and organization, as well aswhether to store binary or stochastic numbers. We present effective resourcesharing scheme for DWM-based weight storage in the convolutional andfully-connected layers of SC-based DCNNs to achieve a desirable balance amongarea, power (energy) consumption, and application-level accuracy.

An Area and Energy Efficient Design of Domain-Wall Memory-Based Deep Convolutional Neural Networks using Stochastic Computing