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Different from developing neural networks (NNs) for general-purposeprocessors, the development for NN chips usually faces with somehardware-specific restrictions, such as limited precision of network signalsand parameters, constrained computation scale, and limited types of non-linearfunctions.  This paper proposes a general methodology to address the challenges. Wedecouple the NN applications from the target hardware by introducing a compilerthat can transform an existing trained, unrestricted NN into an equivalentnetwork that meets the given hardware's constraints. We propose multipletechniques to make the transformation adaptable to different kinds of NN chips,and reliable for restrict hardware constraints.  We have built such a software tool that supports both spiking neural networks(SNNs) and traditional artificial neural networks (ANNs). We have demonstratedits effectiveness with a fabricated neuromorphic chip and aprocessing-in-memory (PIM) design. Tests show that the inference error causedby this solution is insignificant and the transformation time is much shorterthan the retraining time. Also, we have studied the parameter-sensitivityevaluations to explore the tradeoffs between network error and resourceutilization for different transformation strategies, which could provideinsights for co-design optimization of neuromorphic hardware and software.

Bridging the Gap Between Neural Networks and Neuromorphic Hardware with A Neural Network Compiler