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As far as we know, a useful quantum computer will require fault-tolerantgates, and existing schemes demand a prohibitively large space and timeoverhead. We argue that a first generation quantum computer will be veryvaluable to design, test, and optimize fault-tolerant protocols tailored to thenoise processes of the hardware. Our argument is essentially a criticalanalysis of the current methods envisioned to optimize fault-tolerant schemes,which rely on hardware characterization, noise modelling, and numericalsimulations. We show that, even within a very restricted set of noise models,error correction protocols depend strongly on the details of the noise model.Combined to the intrinsic difficulty of hardware characterization and ofnumerical simulations of fault-tolerant protocols, we arrive at the conclusionthat the currently envisioned optimization cycle is of very limited scope. Onthe other hand, the direct characterization of a fault-tolerant scheme on asmall quantum computer bypasses these difficulties, and could provide abootstrapping path to full-scale fault-tolerant quantum computation.

A Small Quantum Computer is Needed to Optimize Fault-Tolerant Protocols