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Mitigating memory-access attacks on the Intel SGX architecture is animportant and open research problem. A natural notion of the mitigation iscache-miss obliviousness which requires the cache-misses emitted during anenclave execution are oblivious to sensitive data. This work realizes thecache-miss obliviousness for the computation of data shuffling. The proposedapproach is to software-engineer the oblivious algorithm of Melbourne shuffleon the Intel SGX/TSX architecture, where the Transaction SynchronizationeXtension (TSX) is (ab)used to detect the occurrence of cache misses. In thesystem building, we propose software techniques to prefetch memory data priorto the TSX transaction to defend the physical bus-tapping attacks. Ourevaluation based on real implementation shows that our system achieves superiorperformance and lower transaction abort rate than the related work in theexisting literature.

Strongly Secure and Efficient Data Shuffle On Hardware Enclaves