English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Plus monthly

Global: Zendy Tools annual

Global: Zendy Tools monthly

Global: Zendy Free Plan

This paper comments on "Asynchronous Logic Implementation Based on FactorizedDIMS" [Journal of Circuits, Systems, and Computers, vol. 26, no. 5, 1750087:1-9, May 2017] with respect to two main problematic issues: i) the gate orphanproblem implicit in the factorized DIMS approach discussed in the referencedarticle which affects its strong-indication, and ii) how the enumeration ofproduct terms to represent the synthesis cost is skewed in the referencedarticle because the logic expression contains sum of products and also productof sums. It is observed that the referenced article has not provided a generallogic synthesis algorithm excepting only an example illustration involving a3-input AND logic function. The absence of a general logic synthesis algorithmwould make it difficult to reproduce the research described in the referencedarticle. Moreover, the example illustration in the referenced article describesan unsafe logic decomposition which is not suitable for the multi-levelsynthesis of strong-indication asynchronous circuits. Further, a logicsynthesis method which safely decomposes the DIMS solution to synthesizemulti-level strong-indication asynchronous circuits is available in theexisting literature, which was neither cited nor taken up for comparison in thereferenced article, which is another drawback. Subsequently, it is concludedthat the referenced article has not advanced existing knowledge in the fieldbut on the contrary, has caused confusions. Hence, in the interest of readers,this paper additionally highlights some important and relevant literature whichprovide valuable information about robust asynchronous circuit synthesistechniques which employ delay-insensitive codes for data representation andprocessing and the 4-phase return-to-zero handshake protocol for datacommunication.

Critique of "Asynchronous Logic Implementation Based on Factorized DIMS"