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High capacity and scalable memory systems play a vital role in enabling ourdesktops, smartphones, and pervasive technologies like Internet of Things(IoT). Unfortunately, memory systems are becoming increasingly prone to faults.This is because we rely on technology scaling to improve memory density, and atsmall feature sizes, memory cells tend to break easily. Today, memoryreliability is seen as the key impediment towards using high-density devices,adopting new technologies, and even building the next Exascale supercomputer.To ensure even a bare-minimum level of reliability, present-day solutions tendto have high performance, power and area overheads. Ideally, we would likememory systems to remain robust, scalable, and implementable while keeping theoverheads to a minimum. This dissertation describes how simple cross-layerarchitectural techniques can provide orders of magnitude higher reliability andenable seamless scalability for memory systems while incurring negligibleoverheads.

Architectural Techniques to Enable Reliable and Scalable Memory Systems