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NAND flash-based Solid State Drives (SSDs), which are widely used fromembedded systems to enterprise servers, are enhancing performance by exploitingthe parallelism of NAND flash memories. To cope with the performanceimprovement of SSDs, storage systems have rapidly adopted the host interfacefor SSDs from Serial-ATA, which is used for existing hard disk drives, tohigh-speed PCI express. Since NAND flash memory does not allow in-placeupdates, it requires special software called Flash Translation Layer (FTL), andSSDs are equipped with embedded processors to run FTL. Existing SSDs increasethe clock frequency of embedded processors or increase the number of embeddedprocessors in order to prevent FTL from acting as bottleneck of SSDperformance, but these approaches are not scalable. This paper proposes ahardware-automated Flash Map Management Unit, called FMMU, that handles theaddress translation process dominating the execution time of the FTL byhardware automation. FMMU provides methods for exploiting the parallelism offlash memory by processing outstanding requests in a non-blocking manner whilereducing the number of flash operations. The experimental results show that theFMMU reduces the FTL execution time in the map cache hit case and the miss caseby 44% and 37%, respectively, compared with the existing software-basedapproach operating in 4-core. FMMU also prevents FTL from acting as aperformance bottleneck for up to 32-channel, 8-way SSD using PCIe 3.0 x32 hostinterface.

FMMU: A Hardware-Automated Flash Map Management Unit for Scalable Performance of NAND Flash-Based SSDs