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Traffic Light Controller, a typical benchmark device, is specified andverified using of a formal model called Concurrent State Machines (CSM) and thesoftware environment COSMA 2.0, which supports the system level specificationand analysis of concurrent, asynchronous and communicating units. The TLCitself is a system of three concurrent components (the controller and twotimers). The paper introduces briefly the CSM model and illustrates how systemcomponents are specified, how the reachability graph of a system is obtainedand how the requirements are formally verified. Finally, the hints for thegeneration of VHDL code for the TLC are given.

System level specification and verification using Concurrent State Machines and COSMA environment