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This paper describes a multi-functional deep in-memory processor forinference applications. Deep in-memory processing is achieved by embeddingpitch-matched low-SNR analog processing into a standard 6T 16KB SRAM array in65 nm CMOS. Four applications are demonstrated. The prototype achieves up to5.6X (9.7X estimated for multi-bank scenario) energy savings with negligible(<1%) accuracy degradation in all four applications as compared to theconventional architecture.

A 481pJ/decision 3.4M decision/s Multifunctional Deep In-memory Inference Processor using Standard 6T SRAM Array