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Increasingly FPGAs will be deployed at scale due to the need for increasedneed for power efficient computation and improved high level synthesis toolflows, creating a new category of device: data centre FPGAs. A method for usingthese FPGAs is to identify what proportion of a given workload would benefitfrom being implemented upon the available FPGAs while minimising communicationoff-chip. As part of the implementation of these tasks, care should be taken inidentifying the parallel execution mode, task or pipeline parallelism thatshould be used. When considering a case study of computational finance tasks, abenchmark workload of Heston and Black-Scholes-based options implemented usingOpenCL and OpenSPL, the benefit of this method of using data centre FPGAs isillustrated. These devices deliver latency performance close to that ofworkstation grade GPUs, while requiring considerably less energy, resulting in30% more floating point operations per Joule of energy consumed.

Algorithmic Trading: A brief, computational finance case study on data centre FPGAs