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In this paper, we describe a high-level synthesis (HLS) tool thatautomatically allows area/throughput trade-offs for implementing streaming taskgraphs (STG). Our tool targets a massively parallel processor array (MPPA)architecture, very similar to the Ambric MPPA chip architecture, which is to beimplemented as an FPGA overlay. Similar to Ambric tools, our HLS tool accepts aSTG as input written in a subset of Java and a structural language in the styleof a Kahn Processing Network (KPN). Unlike the Ambric tools, our HLS toolanalyzes the parallelism internal to each Java "node" and evaluates thethroughput and area of several possible implementations. It then analyzes thefull graph for bottlenecks or excess compute capacity, selects animplementation for each node, and even considers replicating or splitting nodeswhile either minimizing area (for a fixed throughput target), or maximizingthroughput (for a fixed area target). In addition to traditional node selectionand replication methods used in prior work, we have uniquely implemented nodecombining and splitting to find a better area/throughput trade-off. We presenttwo optimization approaches, a formal ILP formulation and a heuristic solution.Results show that the heuristic is more flexible and can find design points notavailable to the ILP, thereby achieving superior results.