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Hybrid analog/digital architectures and receivers with low-resolutionanalog-to-digital converters (ADCs) are two low power solutions for wirelesssystems with large antenna arrays, such as millimeter wave and massive MIMOsystems. Most prior work represents two extreme cases in which either a smallnumber of RF chains with full-resolution ADCs, or low resolution ADC with anumber of RF chains equal to the number of antennas is assumed. In this paper,a generalized hybrid architecture with a small number of RF chains and finitenumber of ADC bits is proposed. For this architecture, achievable rates withchannel inversion and SVD based transmission methods are derived. Results showthat the achievable rate is comparable to that obtained by full-precision ADCreceivers at low and medium SNRs. A trade-off between the achievable rate andpower consumption for different numbers of bits and RF chains is devised. Thisenables us to draw some conclusions on the number of ADC bits needed tomaximize the system energy efficiency. Numerical simulations show that coarseADC quantization is optimal under various system configurations. This meansthat hybrid combining with coarse quantization achieves better energy-ratetrade-off compared to both hybrid combining with full-resolutions ADCs and1-bit ADC combining.

Hybrid Architectures with Few-Bit ADC Receivers: Achievable Rates and Energy-Rate Tradeoffs