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Die-stacked DRAM has been proposed for use as a large, high-bandwidth,last-level cache with hundreds or thousands of megabytes of capacity. Not allworkloads (or phases) can productively utilize this much cache space, however.Unfortunately, the unused (or under-used) cache continues to consume power dueto leakage in the peripheral circuitry and periodic DRAM refresh. Dynamicallyadjusting the available DRAM cache capacity could largely eliminate this energyoverhead. However, the current proposed DRAM cache organization introduces newchallenges for dynamic cache resizing. The organization differs from aconventional SRAM cache organization because it places entire cache sets andtheir tags within a single bank to reduce on-chip area and power overhead.Hence, resizing a DRAM cache requires remapping sets from the powered-downbanks to active banks.  In this paper, we propose CRUNCH (Cache Resizing Using Native ConsistentHashing), a hardware data remapping scheme inspired by consistent hashing, analgorithm originally proposed to uniformly and dynamically distribute Internettraffic across a changing population of web servers. CRUNCH provides aload-balanced remapping of data from the powered-down banks alone to the activebanks, without requiring sets from all banks to be remapped, unlike naiveschemes to achieve load balancing. CRUNCH remaps only sets from thepowered-down banks, so it achieves this load balancing with low bankpower-up/down transition latencies. CRUNCH's combination of good load balancingand low transition latencies provides a substrate to enable efficient DRAMcache resizing.

Enabling Efficient Dynamic Resizing of Large DRAM Caches via A Hardware Consistent Hashing Mechanism