English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Tools annual

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Tools monthly

Global: Zendy Plus monthly

Presents the access of premium content as premium feature

Premium Content

Global: Zendy Plus annual

Global: Zendy Free Plan

We demonstrate a low-power and compact hardware implementation of RandomFeature Extractor (RFE) core. With complex tasks like Image Recognitionrequiring a large set of features, we show how weight reuse technique can allowto virtually expand the random features available from RFE core. Further, weshow how to avoid computation cost wasted for propagating "incognizant" orredundant random features. For proof of concept, we validated our approach byusing our RFE core as the first stage of Extreme Learning Machine (ELM)--a twolayer neural network--and were able to achieve $>97\%$ accuracy on MNISTdatabase of handwritten digits. ELM's first stage of RFE is done on an analogASIC occupying $5$mm$\times5$mm area in $0.35\mu$m CMOS and consuming $5.95$$\mu$J/classify while using $\approx 5000$ effective hidden neurons. The ELMsecond stage consisting of just adders can be implemented as digital circuitwith estimated power consumption of $20.9$ nJ/classify. With a total energyconsumption of only $5.97$ $\mu$J/classify, this low-power mixed signal ASICcan act as a co-processor in portable electronic gadgets with cameras.

Hardware Architecture for Large Parallel Array of Random Feature Extractors applied to Image Recognition