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Heterogeneous computing is emerging as a mandatory requirement forpower-efficient system design. With this aim, modern heterogeneous platformslike Zynq All-Programmable SoC, that integrates ARM-based SMP and programmablelogic, have been designed. However, those platforms introduce large designcycles consisting on hardware/software partitioning, decisions on granularityand number of hardware accelerators, hardware/software integration, bitstreamgeneration, etc.  This paper presents a performance parallel heterogeneous estimation forsystems where hardware/software co-design and run-time heterogeneous taskscheduling are key. The results show that the programmer can quickly decide,based only on her/his OmpSs (OpenMP + extensions) application, which is theco-design that achieves nearly optimal heterogeneous parallel performance,based on the methodology presented and considering only synthesis estimationresults. The methodology presented reduces the programmer co-design decisionfrom hours to minutes and shows high potential on hardware/softwareheterogeneous parallel performance estimation on the Zynq All-Programmable SoC.

Coarse-Grain Performance Estimator for Heterogeneous Parallel Computing Architectures like Zynq All-Programmable SoC