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This paper proposes an efficient reconfigurable hardware design for speechenhancement based on multi band spectral subtraction algorithm and involvingboth magnitude and phase components. Our proposed design is novel as itestimates environmental noise from speech adaptively utilizing both magnitudeand phase components of the speech spectrum. We performed multi-band spectrumsubtraction by dividing the noisy speech spectrum into different non-uniformfrequency bands having varying signal to noise ratio (SNR) and subtracting theestimated noise from each of these frequency bands. This results to theelimination of noise from both high SNR and low SNR signal components for allthe frequency bands. We have coined our proposed speech enhancement techniqueas Multi Band Magnitude Phase Spectral Subtraction (MBMPSS). The magnitude andphase operations are executed concurrently exploiting the parallel logic blocksof Field Programmable Gate Array (FPGA), thus increasing the throughput of thesystem to a great extent. We have implemented our design on Spartan6 Lx45 FPGAand presented the implementation result in terms of resource utilization anddelay information for the different blocks of our design. To the best of ourbest knowledge, this is a new type of hardware design for speech enhancementapplication and also a first of its kind implementation on reconfigurablehardware. We have used benchmark audio data for the evaluation of the proposedhardware and the experimental results show that our hardware shows a better SNRvalue compared to the existing state of the art research works.

A Novel Reconfigurable Hardware Design for Speech Enhancement Based on Multi-Band Spectral Subtraction Involving Magnitude and Phase Components