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Last level cache management and core interconnection network play importantroles in performance and power consumption in multicore system. Large scalechip multicore uses mesh interconnect widely due to scalability and simplicityof the mesh interconnection design. As interconnection network occupiedsignificant area and consumes significant percent of system power, bufferlessnetwork is an appealing alternative design to reduce power consumption andhardware cost. We have designed and implemented a simulator for simulation ofdistributed cache management of large chip multicore where cores are connectedusing bufferless interconnection network. Also, we have redesigned andimplemented the our simulator which is a GPU compatible parallel version of thesame simulator using CUDA programming model. We have simulated target largechip multicore with up to 43,000 cores and achieved up to 25 times speedup onNVIDIA GeForce GTX 690 GPU over serial simulation.

Bufferless NOC Simulation of Large Multicore System on GPU Hardware