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We introduce new methods of equivalence checking and simulation based onComputing Range Reduction (CRR). Given a combinational circuit $N$, the CRRproblem is to compute the set of outputs that disappear from the range of $N$if a set of inputs of $N$ is excluded from consideration. Importantly, in manycases, range reduction can be efficiently found even if computing the entirerange of $N$ is infeasible.  Solving equivalence checking by CRR facilitates generation of proofs ofequivalence that mimic a "cut propagation" approach. A limited version of suchan approach has been successfully used by commercial tools. Functionalverification of a circuit $N$ by simulation can be viewed as a way to reducethe complexity of computing the range of $N$. Instead of finding the entirerange of $N$ and checking if it contains a bad output, such a range is computedonly for one input. Simulation by CRR offers an alternative way of coping withthe complexity of range computation. The idea is to exclude a subset of inputsof $N$ and compute the range reduction caused by such an exclusion. If the setof disappeared outputs contains a bad one, then $N$ is buggy.

Equivalence Checking and Simulation By Computing Range Reduction