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Supervised learning of Convolutional Neural Networks (CNNs), also known assupervised Deep Learning, is a computationally demanding process. To find themost suitable parameters of a network for a given application, numeroustraining sessions are required. Therefore, reducing the training time persession is essential to fully utilize CNNs in practice. While numerous researchgroups have addressed the training of CNNs using GPUs, so far not muchattention has been paid to the Intel Xeon Phi coprocessor. In this paper weinvestigate empirically and theoretically the potential of the Intel Xeon Phifor supervised learning of CNNs. We design and implement a parallelizationscheme named CHAOS that exploits both the thread- and SIMD-parallelism of thecoprocessor. Our approach is evaluated on the Intel Xeon Phi 7120P using theMNIST dataset of handwritten digits for various thread counts and CNNarchitectures. Results show a 103.5x speed up when training our large networkfor 15 epochs using 244 threads, compared to one thread on the coprocessor.Moreover, we develop a performance model and use it to assess ourimplementation and answer what-if questions.

The Potential of the Intel Xeon Phi for Supervised Deep Learning