English (United Kingdom)

https://curated-unify.zendy.io/wp-json/zendy-region/v1/featured_content/oa?rat=en

https://curated-unify.zendy.io/wp-json/zendy-region/v1/highlighted_journal/

Global: Zendy Plus annual

Presents the access of premium content as premium feature

Premium Content

Presents the keyphrase highlighting as premium feature

Keyphrase Highlighting

Presents the summarisation as premium feature

Summarisation

Insights

Presents the pdf analysis as premium feature

PDF Analysis

Presents the zaia usage as premium feature

ZAIA

Global: Zendy Plus monthly

Global: Zendy Tools annual

Global: Zendy Tools monthly

Global: Zendy Free Plan

In high energy physics experiments (HEP), high speed and fault resilient datacommunication is needed between detectors/sensors and the host PC. Transientfaults can occur in the communication hardware due to various external effectslike presence of charged particles, noise in the environment or radiationeffects in HEP experiments and that leads to single/multiple bit error. Inorder to keep the communication system functional in such a radiationenvironment where direct intervention of human is not possible, a high speeddata acquisition (DAQ) architecture is necessary which supports error recovery.This design presents an efficient implementation of field programmable gatearray (FPGA) based high speed DAQ system with optical communication linksupported by multi-bit error correcting model. The design has been implementedon Xilinx Kintex-7 board and is tested for board to board communication as wellas for PC communication using PCI (Peripheral Component Interconnect express).Data communication speed up to 4.8 Gbps has been achieved in board to board andboard to PC communication and estimation of resource utilization and criticalpath delay are also measured.

FPGA based High Speed Data Acquisition System for High Energy Physics Application