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In recent processor development, we have witnessed the integration of GPU andCPUs into a single chip. The result of this integration is a reduction of thedata communication overheads. This enables an efficient collaboration of bothdevices in the execution of parallel workloads.  In this work, we focus on the problem of efficiently scheduling chunks ofiterations of parallel loops among the computing devices on the chip (the GPUand the CPU cores) in the context of irregular applications. In particular, weanalyze the sources of overhead that the host thread experiments when a chunkof iterations is offloaded to the GPU while other threads are executingconcurrently other chunks on the CPU cores. We carefully study these overheadson different processor architectures and operating systems using Barnes Hut asa study case representative of irregular applications. We also propose a set ofoptimizations to mitigate the overheads that arise in presence ofoversubscription and take advantage of the different features of theheterogeneous architectures. Thanks to these optimizations we reduceEnergy-Delay Product (EDP) by 18% and 84% on Intel Ivy Bridge and Haswellarchitectures, respectively, and by 57% on the Exynos big.LITTLE.

Reducing overheads of dynamic scheduling on heterogeneous chips