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Increasing complexity of modern multi-processor system on chip (MPSoC) andthe decreasing feature size have introduced new challenges. System designershave to consider now aspects which were not part of the design process in pasttimes. Resource-aware Computing is one of such emerging design concerns whichcan help to improve performance, dependability and resource utilization ofoverall system. Resource-aware execution takes into account the resource statuswhen executing tasks on MPSoCs. Exploration of resource-aware computing atearly design stages of complex systems is mandatory and appropriatemethodologies to do this in an efficient manner are thus required. In thispaper, we present a modular approach which provides modeling and simulationsupport for investigation of resource-aware execution in MPSoCs. The proposedmethodology enables rapid exploration of the design space by modeling andsimulating the resource-awareness in a separate layer while widely reusing thelegacy system model in the other layer. Our experiments illustrate the benefitsof our approach for the exploration of resource-aware execution on MPSoCs.

A Layered Modeling and Simulation Approach to investigate Resource-aware Computing in MPSoCs