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High luminosity conditions at the LHC pose many unique challenges forpotential silicon based track trigger systems. One of the major challenges isdata formatting, where hits from thousands of silicon modules must first beshared and organized into overlapping eta-phi trigger towers. Communicationbetween nodes requires high bandwidth, low latency, and flexible real time datasharing, for which a full mesh backplane is a natural solution. A customAdvanced Telecommunications Computing Architecture data processing board isdesigned with the goal of creating a scalable architecture abundant inflexible, non-blocking, high bandwidth board to board communication channelswhile keeping the design as simple as possible. We have performed the firstprototype board testing and our first attempt at designing the prototype systemhas proven to be successful. Leveraging the experience we gained throughdesigning, building and testing the prototype board system we are in the finalstages of laying out the next generation board, which will be used in the ATLASLevel-2 Fast TracKer as Data Formatter, as well as in the CMS Level-1 trackingtrigger R&D for early technical demonstrations.

Prototype performance studies of a Full Mesh ATCA-based General Purpose Data Processing Board