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Two concatenated coding schemes based on fixed-rate Raptor codes are proposedfor error control in NAND flash memory. One is geared for off-line recovery ofuncorrectable pages and the other is designed for page error correction duringthe normal read mode. Both proposed coding strategies assume hard-decisiondecoding of the inner code with inner decoding failure generating erasuresymbols for the outer Raptor code. Raptor codes allow low-complexity decodingof very long codewords while providing capacity- approaching performance forerasure channels. For the off-line page recovery scheme, one whole NAND blockforms a Raptor codeword with each inner codeword typically made up of severalRaptor symbols. An efficient look-up-table strategy is devised for Raptorencoding and decoding which avoids using large buffers in the controllerdespite the substantial size of the Raptor code employed. The potentialperformance benefit of the proposed scheme is evaluated in terms of theprobability of block recovery conditioned on the presence of uncorrectablepages. In the suggested page-error-correction strategy, on the other hand, ahard-decision-iterating product code is used as the inner code. The specificproduct code employed in this work is based on row-column concatenation withmultiple intersecting bits allowing the use of longer component codes. In thissetting the collection of bits captured within each intersection of therow-column codes acts as the Raptor symbol(s), and the intersections of failedrow codes and column codes are declared as erasures. The error rate analysisindicates that the proposed concatenation provides a considerable performanceboost relative to the existing error correcting system based on longBose-Chaudhuri-Hocquenghem (BCH) codes.

Concatenated Raptor Codes in NAND Flash Memory